Complex programmable logic device (CPLD) was developed in the mid-1980s with the continuous improvement of semiconductor component technology and the continuous improvement of user requirements for device integration.

There are many manufacturers of complex programmable logic devices (CPLD), with various varieties and structures, but most of them adopt the following two structures. One is CPLD based on product term. The logic unit of this CPLD follows the product term logic unit structure of simple PLD (pal, gal, etc.). At present, most CPLDs belong to this type.

Complex programmable logic device CPLD expands the structure and function of simple PLD. CPLD has more product terms, more macro units and more i/o ports. For example, Altera's multi array matrix max series, flashlogic and classic series, and Xilinx's and lattice's CPLD products all adopt programmable product term structure.

The logic block in CPLD is similar to a small-scale PLD. Usually, a logic block contains 4 ~ 20 macro units, and each macro unit is generally composed of product term array, product term allocation and programmable registers. Each macro unit has multiple configuration modes, and each macro unit can also be used in cascade, so it can realize more complex combinational logic and sequential logic functions. For CPLD with high integration, embedded array blocks with on-chip ram/rom are usually provided.

The programmable interconnection channel mainly provides the interconnection network between logic blocks, macrocells and input / output pins. The input / output block (i/o block) provides the interface between the internal logic and the device i/o pin.

CPLD with large logic scale is generally equipped with JTAG boundary scan test circuit, which can comprehensively and thoroughly test the programmed high-density programmable logic devices. In addition, it can also be programmed in the system through JTAG interface.

Due to the difference of integration process, integration scale and manufacturers, there are also great differences in various CPLD partition structures and logic units.